Device and method for boron diffusion in semiconductors

ABSTRACT

A device and method for semiconductor fabrication includes forming a buffer layer on a semiconductor substrate and depositing an amorphous elemental layer on the buffer layer. Elements of the elemental layer are diffused through the buffer layer and into the semiconductor layer.

BACKGROUND

1. Technical Field

The present invention relates to semiconductor fabrication and moreparticularly to a device and doping method which dopes a silicon basedsemiconductor with boron without the formation of an undesirable boronrich layer (BRL) at the substrate surface.

2. Description of the Related Art

Boron is a common doping element employed in semiconductor devices. Thedoping of silicon crystal with boron has been performed by many methods.These methods include implantation of elemental or molecular boron ions.Boron doping by solid state diffusion can be performed from spin-ondeposited boron doped glass films or boric acid, B₂O₃ films deposited bychemical vapor deposition (CVD) or plasma enhanced CVD processes.

Other solid state diffusion methods include B₂O₃ films formed at asilicon surface via reaction of BBr₃ or BCl₃ vapor with oxygen gas in afurnace tube, B₂O₃ films provided by oxidation of BN materials, andamorphous Boron films (α-boron) deposited by CVD (chemical vapordeposition) on an oxide free silicon at temperatures above 500 degreesC. Still other methods include the growth of a boron doped silicon basesemiconductor layer on top of a substrate by molecular beam epitaxy(MBE) or epitaxial growth by chemical vapor deposition at atmosphericpressure or at a reduced pressure.

There are severe drawbacks associated with each of the above mentionedboron doping methods. For example, ion implantation introduces crystaldamage as a consequence of energy transfer in the stopping process ofincoming ions. This leads to the displacement of the lattice siliconatoms. Depending on the implantation parameters like ion dose, ionenergy and dose flux and on the parameters of the subsequent thermalprocesses, such as heating rate, gas composition in the furnace, etc.,the implantation damage may evolve into secondary extended defects likedislocation loops and stacking faults. These extended defects severelydegrade the electrical properties of p-n junctions and the minoritycarrier lifetime in the bulk.

The diffusion of boron from chemical sources like BBr₃, BCl₃, B₂O₃ ora-boron films in direct contact with a silicon based semiconductor mayresult in the formation of a boron silicon compound phase layer at thesilicon surface, called a Boron Rich Layer (BRL). The BRL is known to beSiB₆. The thickness of the SiB₆ layer is governed by parameters like thetemperature and time of the diffusion process, the concentration ofoxygen in the gas mixture in the case of vapor chemical sourcediffusion, etc.

For heavy boron diffusion, extended crystal defects can be introduced inthe bulk of the wafer induced by stresses associated with the presenceof BRL. This is particularly detrimental for solar cell production whichrequires Boron doping for the creation of back-surface fields in solarcells with a p-type substrate or p⁺-type emitters in solar cell with ann-type substrate, while maintaining a minority carrier lifetime at ahigh value.

The MBE method can produce a boron doped layer of high crystallinequality, however, in cases where the production cost is a key factorlike in photovoltaic industry, this doping alternative is not feasible.

SUMMARY

A device and method for semiconductor fabrication includes forming abuffer layer on a semiconductor substrate and depositing a dopedamorphous or polycrystalline Boron containing layer on the buffer layer.Boron atoms from the Boron containing layer are diffused through thebuffer layer and into the semiconductor layer. After diffusion, theBoron containing layer may be removed, patterned or maintained on thebuffer layer.

A method for semiconductor fabrication includes forming a silicon oxidelayer on a silicon substrate, depositing an elemental Boron layer on thesilicon oxide layer, diffusing elements of the Boron layer through thesilicon oxide layer and into the silicon substrate and removing theBoron layer from the silicon oxide layer.

A semiconductor device includes a silicon substrate, and a doped regionformed in the substrate. The doped region containing Boron atoms isdiffused into the doped region through a buffer layer formed on thesubstrate. The doped region is totally free of a Boron-Rich Layermaterial.

These and other features and advantages will become apparent from thefollowing detailed description of illustrative embodiments thereof,which is to be read in connection with the accompanying drawings.

BRIEF DESCRIPTION OF DRAWINGS

The disclosure will provide details in the following description ofpreferred embodiments with reference to the following figures wherein:

FIG. 1A is a cross-sectional view of a semiconductor device having adopant diffused into a substrate in accordance with the presentprinciples;

FIG. 1B is a cross-sectional view of an illustrative semiconductordevice having a dopant diffused into a substrate in accordance with thepresent principles;

FIG. 2 is a plot of sheet resistance versus Boron diffusion temperaturefor an illustrative embodiment;

FIG. 3A is a plot of Boron depth profiles after diffusion in siliconobtained by secondary ion mass spectroscopy (SIMS) in samples where abuffer layer was employed in accordance with the present principles;

FIG. 3B is a plot of Boron depth profiles after diffusion in siliconobtained by secondary ion mass spectroscopy (SIMS) in samples with nobuffer layer; and

FIG. 4 is a block/flow diagram showing a low-cost method for diffusingBoron without formation of an undesirable Boron Rich Layer (BRL) inaccordance with one illustrative invention.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

The present principles provide methods for low cost Boron doping thatprevents the formation of a Boron Rich Layer (BRL) e.g., a SiB₆ phase.The methods provide a low cost device that does not suffer from thedrawbacks of conventional devices. An amorphous or polyscrystallineelemental layer, e.g., including Boron, is formed on a buffer layerwhich is in turn formed on a semiconductor material. Boron atoms fromthe layer are diffused into the buffer layer and then into thesemiconductor. A supply of Boron atoms to the semiconductor is limitedby the diffusivity in the buffer layer.

In one embodiment, the diffusivity of the atoms in the buffer layer maybe selected to be less than the diffusivity of atoms in thesemiconductor, and a segregation coefficient of the atoms at the bufferlayer/semiconductor interface may be selected to be lower than 1. Inthis way, cost effective dopant diffusion may be provided with a highconcentration of surface atoms and without the formation of undesirablespecies.

In one embodiment, Boron atoms are diffused into a silicon crystal froman elemental amorphous boron film. The Boron film is separated from thesilicon substrate by a thin layer, e.g., a SiO₂ layer of for example, 10nm in thickness. At high temperatures (e.g., above about 800 degreesCelsius), B atoms diffuse from the elemental B film into SiO₂ and thenfrom the SiO₂ diffuse into silicon of a substrate. The supply of Boronatoms to silicon is governed by the Boron diffusivity in SiO₂ (e.g.,diffusivity of B in SiO₂ is less than the diffusivity of B in Si) and bythe segregation coefficient of Boron at the SiO₂—Si interface which islower than 1 (at the SiO₂—Si interface the Boron concentration in the Siis 3 to 10 times lower than B concentration in the SiO₂ side).

It should be understood that the present embodiments will beillustratively described in terms of Si, SiO₂, and B; however, thepresent principles are not limited to these elements and compounds andother materials are contemplated in accordance with the presentprinciples.

The flowchart and block diagrams in the Figures illustrate thearchitecture, functionality, and operation of possible implementationsof methods according to various embodiments of the present invention. Itshould also be noted that, in some alternative implementations, thefunctions noted in the blocks may occur out of the order noted in thefigures. For example, two blocks shown in succession may, in fact, beexecuted substantially concurrently, or the blocks may sometimes beexecuted in the reverse order, depending upon the functionalityinvolved. It will also be noted that each block of the block diagramsand/or flowchart illustration, and combinations of blocks in the blockdiagrams and/or flowchart illustration, can be implemented by specialpurpose hardware-based systems that perform the specified functions oracts, or combinations of special purpose hardware and instructions.

It is to be understood that the present invention will be described interms of a given illustrative architecture on a semiconductor wafer;however, other architectures, structures, substrate materials andprocess features and steps may be varied within the scope of the presentinvention.

Semiconductor circuits described herein may be part of a design for anintegrated circuit chip. The chip design may be created in a graphicalcomputer programming language, and stored in a computer storage medium(such as a disk, tape, physical hard drive, or virtual hard drive suchas in a storage access network). If the designer does not fabricatechips or the photolithographic masks used to fabricate chips, thedesigner may transmit the resulting design by physical means (e.g., byproviding a copy of the storage medium storing the design) orelectronically (e.g., through the Internet) to such entities, directlyor indirectly. The stored design is then converted into the appropriateformat (e.g., GDSII) for the fabrication of photolithographic masks,which typically include multiple copies of the chip design in questionthat are to be formed on a wafer. The photolithographic masks areutilized to define areas of the wafer (and/or the layers thereon) to beetched or otherwise processed.

Methods as described herein may be used in the fabrication of integratedcircuit chips. The resulting integrated circuit chips can be distributedby the fabricator in raw wafer form (that is, as a single wafer that hasmultiple unpackaged chips), as a bare die, or in a packaged form. In thelatter case the chip is mounted in a single chip package (such as aplastic carrier, with leads that are affixed to a motherboard or otherhigher level carrier) or in a multichip package (such as a ceramiccarrier that has either or both surface interconnections or buriedinterconnections). In any case the chip is then integrated with otherchips, discrete circuit elements, and/or other signal processing devicesas part of either (a) an intermediate product, such as a motherboard, or(b) an end product. The end product can be any product that includesintegrated circuit chips, ranging from toys and other low-endapplications to advanced computer products having a display, a keyboardor other input device, and a central processor. In particularly usefulembodiments, the present principles are employed to form photovoltaicdevices or other integrated circuit devices.

Referring now to the drawings in which like numerals represent the sameor similar elements and initially to FIG. 1A, a semiconductor wafer orsubstrate 10 is shown in accordance with one illustrative example. Thesubstrate 10 may include a mono-crystalline bulk material, asemiconductor on insulator structure or any other suitable material orstructure. In a preferred embodiment, substrate 10 may includecrystalline Si, polycrystalline or multicrystalline silicon, singlecrystalline germanium or silicon germanium (Si_(x)Ge_(1-x)), siliconcarbide (SiC), etc. A buffer layer 12 is formed over the substrate 10.In one embodiment, the buffer layer 12 includes SiO₂. The buffer layer12 may include a thickness of about 2-50 nm, although other thicknessesmay be employed.

An elemental film 14 is deposited on the buffer layer 12. The elementalfilm 14 preferably includes B and, in particular, amorphous Boron(α-Boron), although other dopant films may be employed, such as, e.g.,heavily Boron doped amorphous or polycrystalline silicon orsilicon-germanium films, etc. In a particularly useful embodiment,α-Boron is formed from cracked B₂H₆ molecules by a plasma discharge in aplasma enhanced chemical vapor deposition (PECVD) reactor. Thetemperature of the semiconductor wafer 10 during the deposition processcan be as low as 200 degrees Celsius. The deposition process may takeonly few seconds to deposit, e.g., a 5 nm thick α-Boron film. It shouldbe noted that the resulting boron concentration diffused into silicon(10) is insensitive to the thickness of α-Boron film, since a film ofonly few nm thick can be considered an infinite Boron source.

An optional cap film 16 (e.g., SiO₂ or any other thermally stabledielectric film) may optionally be deposited on top of elemental film14, in the same PECVD reactor or using a different deposition method.The cap film may be a few to several hundreds of nanometers thick (e.g.,about 5-500 nm). It should be noted that the elemental film 14, thebuffer layer 12 and/or the cap film 16 may be patterned or selectivelyformed on a surface of the substrate 10 as is desirable or needed for agiven application or function.

The diffusion doping of elements from the elemental film 14 (e.g., B)into the substrate 10 (e.g., Si based semiconductor) may be performed attemperatures above about 800 degrees Celsius in a conventional furnaceor in a rapid thermal anneal furnace. Diffusion is controlled by thediffusion time, diffusion temperature and thickness of the buffer layer12 (e.g., interfacial oxide). Another parameter which influences theelemental diffusion in the case of B is the presence of H₂ in thefurnace atmosphere. H₂ enhances the diffusivity of Boron in SiO₂. Thepresence of fluorine in oxide (buffer layer 12) also plays a role toenhance B diffusivity in a SiO₂ buffer layer (12). Both processes may beemployed concurrently as well.

After diffusion is completed, the ζ-Boron film 14 may be removed by athermal oxidation of Boron, a dilute HF etching; by a chemical treatmentin a mixture of H₂SO₄ and HNO₃ (e.g., 1:1 volume) followed by dilute HFetching; by plasma etching; etc. Boron oxidation at temperatures above700 degrees Celsius followed by an HF etch is the preferred process toremove an α-Boron layer.

In other embodiments, the Boron containing layer 14 may be left inplace. The layer 14 may be used as anti-reflective coat in a solar cell,a chemical resistant layer to mask against chemical etching inlithography processes, etc. The buffer layer 12 will remain below thelayer 14 in those areas where layer 14 is maintained.

The Boron doped substrate of FIG. 1A may be employed in a photovoltaiccell. Additional processing is performed to complete the photovoltaicdevice.

FIG. 1B shows an illustrative device 20 formed using the diffusionmethods in accordance with the present principles. Device 20 includes agate structure 24 having source and drain (S/D) regions 22 formedadjacent thereto. The substrate 10 may include one or more dopantregions, e.g., the S/D regions 22, wells, etc., formed in accordancewith the present principles. The device structure is illustrative. Otherstructures are also contemplated.

Referring to FIG. 2, sheet resistance (R_(s) in Ohms per square) forBoron diffused into n-type silicon for 30 minutes versus diffusiontemperature (degrees C.) in a nitrogen atmosphere is illustrated. Thesubstrate was an n-type silicon wafer of resistivity of 15 Ohm-cm. Anelemental α-Boron film (14) was 65 nm thick prepared by a PECVD method,the buffer layer 12 is an interfacial silicon dioxide film thermallygrown on a silicon substrate with a thickness of 10 nm. The α-Boron filmwas capped with a 100 nm thick SiO₂ cap layer prepared by PECVD. As canbe seen, the sheet resistance was reduced with higher diffusiontemperature.

Referring to FIG. 3A, Boron depth profiles for Boron diffusion insamples produced in accordance with the present principles are shown.The profiles were generated using secondary ion mass spectrometry(SIMS). FIG. 3A shows Boron concentration versus depth into a substrate(e.g., an n-type silicon substrate). FIG. 3A includes three profiles:one profile 50 is for a diffusion temperature of 900 degrees Celsius for30 minutes, another profile 52 is for a diffusion temperature of 950degrees Celsius for 60 minutes and another profile 54 is for a diffusiontemperature of 1050 degrees Celsius for 60 minutes (all in a nitrogenatmosphere). Profiles 50, 52 and 54 had an α-Boron layer deposited onthe silicon substrate which was covered by a 10 nm thick SiO₂ layer.

The Boron profiles for the set of profiles 50, 52 and 54 show excellentcontrol (e.g., diffused dose and diffusion length). There is noformation of a Boron Rich Layer (BRL). Other temperatures and times arealso contemplated for diffusion.

Referring to FIG. 3B, an α-Boron film was deposited on an oxide freesilicon surface (no buffer layer). It is apparent in the boron profilesof FIG. 3B that a Boron Rich Layer (BRL) is present at the siliconsurface denoted by the plateau at or near the silicon surface in theprofiles. FIG. 3B includes three profiles: one profile 60 is for adiffusion temperature of 850 degrees Celsius for 120 minutes, anotherprofile 62 is for a diffusion temperature of 900 degrees Celsius for 30minutes and another profile 64 is for a diffusion temperature of 950degrees Celsius for 30 minutes (all in a nitrogen atmosphere). Theα-Boron layer was removed using the same method used for profiles are50, 52 and 54.

Note that the BRL is absent in the boron depth profiles of FIG. 3A,which employed the buffer layer in accordance with the presentprinciples. In addition, the concentration of diffused Boron in thecrystal is increased at greater depths for the FIG. 3A samples.

Referring to FIG. 4, a method for semiconductor fabrication isillustrative shown in accordance with the present principles. In block102, a semiconductor substrate or other material which is to be doped isprovided. The semiconductor substrate may include a monocrystallinematerial, preferably silicon or including silicon, although othermaterials may be employed. It should be understood that thesemiconductor substrate may be processed in advance with shallow trenchisolation regions, other dopants, the formation of other structures,etc. In block 106, a buffer layer is formed on the semiconductorsubstrate. The buffer layer may be grown on the substrate, e.g., asilicon oxide, or may be deposited. In one embodiment, the oxideincludes a thickness of between about 2 nm and 50 nm.

In block 110, a layer is deposited on the buffer layer, such as a Boroncontaining layer, e.g., amorphous or polycrystalline. The Boroncontaining layer may include amorphous elemental Boron, heavily Borondoped amorphous or polycrystalline Si or Si_(x)Ge_(1-x), etc. Theamorphous elemental α-Boron layer may be formed by cracking B₂H₆molecules in a plasma discharge in block 112. In block 113, a cap layer(for chemical protection) may be formed on the elemental layer. The caplayer may include a silicon oxide or the like.

In block 114, dopant elements of the elemental layer are diffusedthrough the buffer layer and into the semiconductor layer. The diffusionin accordance with the present principles is aided by the selection ofmaterials.

In block 116, the buffer layer and the elemental layer are preferablyselected such that a diffusivity of the elements in the buffer layer isless than a diffusivity of the elements in semiconductor. In block 118,materials for the buffer layer and the elemental layer are preferablyselected such that a segregation coefficient of the elements at thebuffer layer—semiconductor interface is less than 1. In block 120, thediffusion is carried out by applying about 800 or more degrees Celsiusto diffuse the elements into the semiconductor layer. In block 122,diffusion may be enhanced by providing an appropriate ambient atmosphereor chemistry in a processing chamber. E.g., in the case of B in asilicon oxide layer an atmosphere of H₂ and/or the presence of fluorinein a silicon oxide buffer layer may be employed to enhance diffusion. Inblock 124, the cap layer, if present, is removed from the Boroncontaining layer. The elemental layer (Boron containing layer) may beremoved from the buffer layer, or the elemental layer may be left inplace or patterned as needed.

The elemental layer can also be removed in only selected areas, viaexposing its surface (e.g., by etching the cap layer at certainlocations) to allow localized oxidation of the Boron layer. An HF etchwill remove the oxidized boron, while the Boron layer is preserved inareas where it is still covered by the cap layer. This process can bedone before or after boron diffusion. Processing may continue as needed.

Having described preferred embodiments of a device and method forelemental Boron diffusion in silicon and silicon compound semiconductors(which are intended to be illustrative and not limiting), it is notedthat modifications and variations can be made by persons skilled in theart in light of the above teachings. It is therefore to be understoodthat changes may be made in the particular embodiments disclosed whichare within the scope of the invention as outlined by the appendedclaims. Having thus described aspects of the invention, with the detailsand particularity required by the patent laws, what is claimed anddesired protected by Letters Patent is set forth in the appended claims.

1. A method for semiconductor fabrication, comprising: forming a bufferlayer on a semiconductor layer; depositing an amorphous orpolycrystalline elemental layer on the buffer layer; and diffusingelements of the elemental layer through the buffer layer and into thesemiconductor layer.
 2. The method as recited in claim 1, whereinforming a buffer layer includes forming an oxide of the semiconductorlayer.
 3. The method as recited in claim 2, wherein the oxide includes athickness of between about 2 nm and 50 nm.
 4. (canceled)
 5. The methodas recited in claim 1, wherein depositing an amorphous orpolycrystalline elemental layer on the buffer layer includes depositingan amorphous Boron layer on a silicon dioxide buffer layer.
 6. Themethod as recited in claim 1, wherein diffusing elements of theelemental layer through the buffer layer and into the semiconductorlayer includes applying at least 800 degrees Celsius to diffuse theelements into the semiconductor layer.
 7. The method as recited in claim1, wherein diffusing elements of the elemental layer through the bufferlayer and into the semiconductor layer includes selecting materials forthe buffer layer and the elemental layer such that a diffusivity of theelements in the buffer layer is less than a diffusivity of the elementsin semiconductor.
 8. The method as recited in claim 1, wherein diffusingelements of the elemental layer through the buffer layer and into thesemiconductor layer includes selecting materials for the buffer layerand the elemental layer such that a segregation coefficient of theelements at the buffer layer—semiconductor interface is less than
 1. 9.The method as recited in claim 1, further comprising forming a cap layeron the elemental layer.
 10. The method as recited in claim 1, whereinthe amorphous elemental layer includes α-Boron formed by cracking B₂H₆molecules in a plasma discharge.
 11. A method for semiconductorfabrication, comprising: forming a silicon oxide layer on a siliconsubstrate; depositing an elemental Boron layer on the silicon oxidelayer; and diffusing elements of the Boron layer through the siliconoxide layer and into the silicon substrate.
 12. The method as recited inclaim 11, wherein diffusing elements of the Boron layer includesenhancing diffusivity of Boron in the silicon oxide layer in anatmosphere containing H₂ or doping the buffer layer with fluorine. 13.The method as recited in claim 11, wherein the silicon oxide includes athickness of between about 2 nm and 50 nm.
 14. The method as recited inclaim 11, wherein diffusing elements includes applying at least 800degrees Celsius to diffuse the elements into the silicon dioxide layerand the silicon substrate.
 15. The method as recited in claim 11,wherein diffusing elements includes selecting materials such that adiffusivity of the elements in the silicon dioxide layer is less than adiffusivity of the elements in the semiconductor substrate.
 16. Themethod as recited in claim 11, wherein diffusing elements includesselecting materials such that a segregation coefficient of the elementsat the silicon dioxide—semiconductor substrate interface is less than 1.17. The method as recited in claim 11, further comprising forming a caplayer on the Boron layer.
 18. The method as recited in claim 11, whereinthe elemental Boron layer includes α-Boron formed by cracking B₂H₆molecules in a plasma discharge.
 19. A semiconductor device, comprising:a silicon substrate; and a doped region formed in the substrate, thedoped region containing Boron atoms diffused into the doped regionthrough a buffer layer formed on the substrate, the doped region beingtotally free of a Boron-Rich Layer material.
 20. The device as recitedin claim 19, wherein the semiconductor device is included in aphotovoltaic cell.
 21. The device as recited in claim 19, wherein thebuffer layer includes silicon dioxide.
 22. The device as recited inclaim 19, wherein a diffusivity of Boron in the buffer layer is lessthan a diffusivity of Boron in the silicon substrate.
 23. The device asrecited in claim 19, wherein a segregation coefficient of the Boron atthe buffer layer—silicon substrate interface is less than
 1. 24. Thedevice as recited in claim 19, wherein the buffer layer includes athickness of between about 2 nm and 50 nm.
 25. The device as recited inclaim 19, further comprising a Boron containing layer formed on thebuffer layer.
 26. The device of claim 25, wherein the Boron containinglayer includes α-Boron.